luvdunhill

cool beans! I didn't realize the original design was so low

dew eet " Reply by supra_buyer (Jul-13-09 17:35): Please return for full refund if not completely satisifed. No questions asked. "

yup.

Give Mikhail a big "f-you" from us all...

why do I doubt that this is really the case?

Cool. I'll get with you and we can hash it out sometime this week

I have something in the works... pretty crazy though. I use a SLA battery to generate 3 phase AC power. Key components are, precision clock, lots of logic ICs, 41Hz chip amp, and three toroids wired in reverse to step up the voltage. I decided not to use an ipod playing a .wav to generate the control frequency for AC power, that's crazy.

Jacob: The changes look fantastic! I just collected all my notes and here are the remaining suggestions that I have: 1.) On C1 can you enlarge the holes to 1mm diameter? 2.) In post #884 I suggested a change to the silk for the dual devices. It would be great if you could implement this, as this part of the assembly is very confusing. I'm sure someone will screw this up. I'd also add the 2SJ109, 2SK389, 2SA1349, 2SC3381 nomenclatures on the silk as well, per my the mockup part I included in post #884, as you have plenty of room. Trust me, when people are installing the devices, they will thank you profusly for this change. 3.) Along these lines, can we label the positive and negative power inputs? For some reason I blindly assumed the positive was on the left... Glad I double checked it in the end! 4.) Furthermore, can we add the cap ratings as well to the silk? It's hard to tell without really understanding the layout that the top two caps need to be >=63V caps and the bottom for need to be >=35V caps.. Again, I made this mistake, and I'm glad digger945 pointed it out early 5.) For the four bottom caps, I think if you separate them out a bit, you might be able to cram in slightly larger diameter caps. I guess what I'm asking, is it possible to make the bottom four caps 18mm diameter as well? 6.) I'm not sure what your DRC rules are set to, but the output pad seems very close to the FET pads. In looking at the copper, if you moved the output down a bit, you could perhaps get another fenestration to connect from the power planes to the output FETs, and that might be worth it. I'm not sure, but it might be worth looking at. 7.) Would it be possible to go back to the prototype buffer layout where none of the transistors are facing each other? I'm just concerned because these get so hot that the BJTs will start to runaway and the buffer become unstable. I liked the prototype layout where there was two rows and they were all lined up. I think you could even space the two rows apart a little more to help with cooling, and if this is possible, which it looks, I'd definitely try and do this. If you want to face some of the transistors together, I'd recommend the CCS transistors (i.e. the three pair that are not a part of the buffer) as this could potentially help the offset be even more stable. For example, I'm not sure if the BJT facing the LED is the best idea, but who knows. Maybe at minimum you could turn these two to face each other? 8.) Pars recommended a flush socket part in post #886 that may be worth looking into supporting. Looking into it, it's an easy change I believe... along these lines, I'm assuming it was too hard to enlarge the outer pads on the resistor footprint? You mentioned that you might be able to do this in post #893. I'm assuming this wasn't possible? Even the smallest amount of room would be greatly appreciated, as it's a very tight fit and many of us are hoping to use PRP resistors, which due to uneven tolerances will be even tougher to fit than the Dales. 9.) I noticed that all the holes on the top of the board for mounting the FETs and the board itself almost fit a #6 screw... maybe it's a M5 hole? Anyways, could we enlarge these a tiny bit so #6 would fit without "threading" the through-hole plating? 10.) You might want to make the screw on the center pot point to the right of the board, as that way the value will be visible when it is installed and hooked up to the heat sink, since this is a rather important value for determining the bias range. I had the hardest time trying to read this value once it was installed on my heat sink Obviously people can swap the part themselves, but the silk is a good reminder 11.) I'd line up R57-R58 with R7,R8,R10,R12 and line up R1-R4 with R59, if possible. I like resistors in nice neat rows I suppose Finally, what PCB fab are you considering? I'd sort like black solder mask, with gold plated pads, with 2 oz copper Depending on where you get the boards made up, these aren't really all that expensive. Check Phoenix Gold for example, who even offers colored solder mask and gold plated finish for free for larger orders, and at a nominal cost for smaller orders. I wasn't so impressed with the silk screen from PCBFabEx, but everything else was top notch... However, I'm not sure that their quantity pricing is very competitive, compared to some of the other places, hence the question... oh, and black boards FTW.

digger945: cool! Can I also get the Vf for the LEDs in the buffers, so I can finish calculating the dissipation there? j4cbo: I'll sit down and print a copy of the boards out and look over them tomorrow, but on first glance things look perfect!

Kevin discussed this in posts #1001 and #1076. I did as well in a few more posts.

bah, wasting all my matching efforts and raising output impedance? madness!

not to mention the backwards resistors and rather static attenuation

We need to finalize the production boards and place the order. When we do this is really dependent on how much feedback we as a team want from Kevin and digger945. It probably makes sense to get as much feedback as possible from the both of them. I've made my suggestions in this thread and have sorta moved on to other things that are on my plate. Whether or not all the suggestions are implemented is really up to j4cbo I guess, and how willing he is to comb back through the thread and meticulously pick up all the comments and suggestions ... as he's the one that will implement the changes and feature requests. Once I receive the boards, I'll send out the boards with the matched devices. This includes the JFETs, the BJTs and the MOSFETs. There is still a little bit more matching to do, probably 40 hours or so. I don't even want to think how much time I've already spent... That's about it I think.

why not use a plate amp and case it up, or even a car amp?

dude that is sooo last night...

We had 0day for Chrome the second it was publically released. Literally that second. The same will happen for ChromeOS, I bet.

more like 1/4 of a discrete I/V

I think that's where the magic pebbles go.

some green things with "tooleaudio" printed on them

whatever les_garten is smoking telling off jp#s like that...

I dunno how to explain it. Maybe someone else can better. But, this calculation is fail: 18W / 60V = 300mA / 8 FETs = 37.5mA per FET this calculation is win: 18W / 60V = 300mA / 4 FET pairs = 75mA per FET Then power per device is 75mA * 30V. And with 75mA * 30V * 8 devices = 18W we're back to where we started.

no, four pairs at 75mA through each pair. Remember, current is calculated (edit: maybe "defined" is a better word, I dunno) from rail to rail. So, if one n-ch flows 75mA then the other complimentary p-ch device flows 75mA.

no. The original design was 150mA per FET with 4 devices. See the posts above. Once you doubled to eight, it requires double the heat sink. Instead, Kevin halved the bias so he didn't have to go out and by a larger heat sink, or go from 2 boards per heat sink to one, or run the die temperature way up.

See Kevin's post above. Nothing has changed. Four FETs @ 150mA or 8 FETs @ 75mA. Same heat. I ran them harder just as a proof of concept, but this has always been the recommended current.

Would it help if I sent you a 160VA 2x30 toroid? Probably could drop it in the cheapest flat rate USPS box.